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Systematic Synthesis of Multimode Reconfigurable RTL Components
 
E. Xanthopoulos-Sotiriou, G. Economacos, K. Siozios and D. Soudris
Workshop on Reconfigurable Computing (WRC), pp. 95-104, Jan. 2011, Heraklion, Greece.
 
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Abstract:
Reconfigurable computing is a cost-effective alternative to technology shrinking in order to achieve higher performance in digital design, especially considering run time recon guration. Research in the eld consists of new recon gurable architectures, either coarse-grain or fine-grain, and new methodologies to map applications onto them. Usually, top-down methodologies are proposed, that start from the application's data ow graph and try to merge di erent parts into the same recon gurable component. This paper presents a bottom-up approach, that searches available RTL component libraries for primitives that can be connected in alternative ways and generate new components, with different modes of functionality. Such components, called morphable components, are designed to impose the minimum accepted area and timing overhead, without any recon guration overhead. The great advantage of the bottom-up approach is that it can be integrated easily with existing design methodologies and tools, o ering great overall performance improvements. The results obtained with di erent DSP benchmarks in a high-level synthesis environment show an average performance gain of 15%, without any practical datapath area increase, offering uniform and balanced resource utilization.

Last Update: 09 October 2016