HOME PUBLICATIONS EDUCATION RESEARCH PROJECTS SOFTWARE FUNNY CONTACT

GENESIS: Parallel Application Placement onto Reconfigurable Architectures
 
D. Diamantopoulos, K. Siozios, S. Xydis and D. Soudris
ACM Transactions on Embedded Computing Systems (TECS), Vol. 14, No. 1, Article 18, 26 pages, January 2015
 
   Download Paper [BibTeX] [EndNote] [ACM Ref]
Abstract:
Placement is though as the most time-consuming processes in physical implementation flows for reconfigurable architectures, while it highly affects the quality of derived application implementation, as it has impact on the maximum operating frequency. Throughout this paper we propose a novel placer, based on genetic algorithm, targeting to FPGAs. Rather than relevant approaches which are executed sequentially, the new placer exhibits inherent parallelism, which can benefit from multi-core processors. Experimental results prove the effectiveness of this solution, since it achieves average reduction of execution run-time and application's delay by 67x and 16%, respectively.

Last Update: 09 October 2016