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A Power Estimation Technique for Cycle-Accurtate Higher-Abstraction SystemC-based CPU Models
 
E. Sotiriou-Xanthopoulos, G. Shalina, P. Figuli, K. Siozios, G. Economakos, J. Becker
International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, (SAMOS), pp. 70–77, July 2015, Samos, Greece
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Abstract:
Due to the ever-increasing complexity of embedded system design and the need for rapid system evaluations in early design stages, the use of simulation models known as Virtual Platforms (VPs) has been of utmost importance as they enable system modeling at higher abstraction levels. Since a typical VP features multiple interdependent components, VP libraries have been utilized in order to provide off-the-shelf models of commonly-used hardware components, such as CPUs. However, CPU power estimation is not adequately supported by existing VP libraries. In addition, existing power characterization techniques require architectural details which are not always available in early design stages. To address this issue, this paper proposes a technique for power annotation of CPU models targeting SystemC/TLM libraries in order to enable the accurate power estimation at higher abstraction levels. By using a set of benchmarks on a power-annotated SystemC/TLM model of Xilinx Microblaze soft-processor, it is shown that the proposed approach can achieve accurate power estimation in comparison to the real-system power measurements as the estimation error ranges from 0.47% up to 6.11% with an average of 2%.

Last update: 15 November 2017