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I. Pappas, N. Vassiliadis, V. Kalenteridis, H. Pournara, S. Nikolaidis, S. Siskos, K. Siozios, G. Koutroumpezis, K. Tatas, D. J. Soudris and A. Thanailakis, "Fine-Grain Reconfigurable Platform: FPGA Hardware Design and Software Toolset Development", Conference on Microelectronics Microsystems and Nanotechnology, pp. 352-356, Nov. 2004, Greece.
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Abstract:
A complete system for the implementation of digital logic in a fine-grain reconfigurable platform is introduced. The system is composed of two parts: The fine-grain reconfigurable hardware platform (FPGA) on which the logic is implemented and the set of CAD tools for mapping logic to the FPGA platform. A novel energy-efficient FPGA architecture is presented (CLB, interconnect network, configuration hardware) and simulated in STM 0.18μm CMOS technology. Concerning the tool flow, each tool can operate as a standalone program as well as part of a complete design framework, composed by existing and new tools.
 

Last update: 18 May 2018