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A Survey of Fine-Grain Reconfigurable Architectures and Processors
 
K. Tatas, K. Siozios, and D. Soudris
Book Chapter in "Fine- and Coarse-Grain Reconfigurable Systems", Editors: S. Vassiliadis and D. Soudris, pp. 3–88,
Springer, 2007.
 
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Abstract:
This chapter contains an introduction to FPGA technology that includes architecture, power consumption and configuration models, as well as an extensive survey of existing fine-grain reconfigurable architectures that have emerged from both academia and industry. All aspects of the architectures, including logic block structure, interconnect, and configuration methods are discussed. Qualitative and quantitative comparisons in terms of testability, technology portability, design flow completeness and configuration type are shown. Additionally, the implementation techniques and CAD tools (synthesizers, LUT-mapping tools and placement and routing tools) that have been developed to facilitate the implementation of a system in reconfigurable hardware by the industry (both by FPGA manufacturers and third-party EDA tool vendors) and academia are described.

Last Update: 09 October 2016