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System-Level Exploration of 3-D Interconnection Schemes
 
K. Siozios, A. Papanikolaou, A. Bartzas and D. Soudris
Friday Workshop on 3D Integration at Design, Automation and Testing in Europe (DATE), April 2009, Nice, France.
 
 
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Abstract:
3-D chip stacking is the big next step in system integration. Even though the process technology is maturing, many issues related to system implementation are not fully understood yet. Furthermore, this 3-D integration comes in many different flavors. Adoption in mainstream industrial design flows requires the availability of tools that allow designers to evaluate the cost and benefits of 3-D integration, compared to conventional system implementations. In this paper we propose a software-supported framework for architecture-level exploration and system prototyping on 3-D ICs. The results show that 3-D integration provides significant improvements among others in wire-length, delay, power/energy consumption, as well as die area, compared to conventional 2-D implementations.

Last Update: 09 October 2016