Dr. Kostas Siozios @ Internet


Μέλος της ερευνητικής oμάδας Ασύρματων Και Φωτονικών Συστημάτων Και Δικτύων (PhosNet)
Member of Maxeler's Technologies University Program
During the previous years, I have worked on different topics of digital and embedded systems. Next, you can find a number of short presentations that hihgligh main aspects of this work.
Internet of Things (IoT) & CyberPhysical Systems (CPS)
Overview of IoT and CPS technologies. Discussion about open topics and challenges.
Smart thermostats and low-complexity decision making.
3-D Integration
Design framework for exploring alternative (homogeneous/heterogeneous) distributions of TSVs at 3-D Field-Programmable Gate Arrays (FPGAs).
Design and evaluation of interconnection networks for 3-D FPGAs. Emphasis is given at the distribution of I/O (input/output) networks. This architecture is primarly important for communication-intensive applications.
CAD Tools
MEANDER design framework for architecture-level exploration of FPGAs. This framework is also used for programming academic FPGA architectures (similar to AMDREL FPGA device).
A framework for performing application placement onto FPGA devices. The solving engine for this algorithm is genetic-algorithm, which is a highly parallelizable solution. This leads to significant lower execution run-time.
ANT3D: A simultaneous Partitioning and placement algorihtm for 3-D reconfigurable architectures. Instead of using simulated-annealing (similar to the majority of existing placers), the ANT3D relies on Ant Colony Optimization engine, which is highly parallelizable (and hence takes benefit of existing multi-/many-core CPUs).
A software tool for supporting efficient partial reconfiguration of FPGAs with Just-in-Time compilation. Instead of similar flows, the introduced one exhibits significant lower execution run-time.
A framework for enabling Dynamic Memory Management (DMM) in Vivado-HLS (High-Level Synthesis) flow. This is primarly important for scalable many-accelerator reconfigurable architectures.
Fault-Tolerance & Reliability Enhancement
A framework for rapid exploration of process variability in Xilinx FPGAs.
A software framework for supporting dynamic fault masking at FPGAs with the usage of virtual FPGA (V-FPGA) cores.
A software framework for computing thermal maps (distribution of on-chip temperature values). This solution exhibits remarkable lower computational complexity, as compared to HotSpot tool (provided by University of Virginia) without impact on the quality of derived results.
Thermal optimization of micro-architectures through selective block replication.
Virtualization & Rapid Prototyping
Plug&Chip Rapid Prototyping Framework
Demo for Plug&Chip framework (18 MB). It demonstrates the performance improvement achieved with the usage of Plug&Chip framework (additional details can be found here)
A software framework for co-design of many-accelerator heterogeneous systems exploiting virtual platforms.
Computer Vision for Space Applications
Overview of research activities related to ESA funded projects.
Efficient implementation of computer vision algorithms, as they are derived from SPARTAN & SEXTANT projects (European Space Agency).
Demo (291 MB) that exhibits the co-design of localization algorithm, as it is derived from SPARTAN & SEXTANT projects (European Space Agency).
Summary of Research Activities at FPGAs
Overview of research activities, both at architectural and CAD levels, for reconfigurable architecutes.


Last update: 15 November 2017