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Research Topics
3D Integration
Fault-Tolerant and Reliability Improvement
Heterogeneous FPGAs
FPGA Design and Supporting CAD Tools
CAD Algorithms
Virtualization
Network-on-Chip (NoC)
Application Implementation onto FPGAs
Power Optimization
Smart Cities / Internet-of-Things (IoT) / CyberPhysical Systems (CPS)
Programming

Publications

3D Integration

2014

H. Sidiropoulos, K. Siozios and D. Soudris, "A Novel 3-D FPGA Architecture Targeting Communication Intensive Applications", Journal of Systems Architecture (JSA), Vol. 60, No. 1, pp. 32-39, Jan. 2014.
2012 K. Siozios, V.F. Pavlidis, and D. Soudris, "A Novel Framework for Exploring 3-D FPGAs with Heterogeneous Interconnect Fabric", ACM Transactions on Reconfigurable Technology and Systems (TRETS), Vol. 5, No. 1, pp. 4:1-4:23, March 2012.
2012 D. Diamantopoulos, K. Siozios and D. Soudris, "Framework for Performing Rapid Evaluation of 3-D SoCs", IET Electronics Letters, pp. 679-681, June 2012.

2012

H. Sidiropoulos, K. Siozios and Dimitrios Soudris, "On Supporting Efficient Implementation of Communication-Intensive Applications onto 3D FPGAs", Workshop on Reconfigurable Computing (WRC), Jan. 2012, Paris, France.

2011

H. Sidiropoulos, K. Siozios and D. Soudris, "A Framework for Architecture-Level Exploration of 3-D FPGA Platforms", International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 298-307, Sept. 2011, Madrid, Spain.

2011

H. Sidiropoulos, K. Siozios and D. Soudris, "A Framework for Architecture-level Exploration of Communication Intensive Applications onto 3-D FPGAs", International Conference on Field Programmable Logic and Applications (FPL), pp. 30-33, Sept. 2011, Chania, Greece.

2011

K. Siozios, A. Papanikolaou and D. Soudris, "CAD Tools for Designing 3D Integrated Systems", IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2229-2232, May 2011, Rio de Janeiro, Brazil.
2011 D. Diamantopoulos, K. Siozios, D. Bekiaris, and D. Soudris, "A Novel Methodology for Architecture-Level Exploration of 3D SoCs", Design & Technology of Integrated Systems in Nanoscale Era (DTIS), pp. 1-6, Apr. 2011, Athens, Greece.
2009 K. Siozios, V. Pavlidis, and D. Soudris, "A Software-Supported Methodology for Exploring Interconnection Architectures Targeting 3-D FPGAs", Proceedings in Design, Automation and Testing in Europe (DATE), pp. 172-177, April 2009, Nice, France.
2009 K. Siozios, A. Papanikolaou, A. Bartzas and D. Soudris, "System-Level Exploration of 3-D Interconnection Schemes", Friday Workshop on 3D Integration at Design, Automation and Testing in Europe (DATE), April 2009, Nice, France.
2009 K. Siozios and D. Soudris, "A Novel Methodology for Exploring Interconnection Architectures Targeting 3-D FPGAs", Workshop on Reconfigurable Computing (WRC), Jan. 2009, Phafos, Cyprus.
2009 K. Siozios, D. Soudris and G. Economakos, "Three-Dimensional FPGA Architectures: A Shift Paradigm for Energy-Performance Efficient DSP Implementations", International Conference on Digital Signal Processing (DSP), pp. 1-6, July 2009, Santorini, Greece.
2008 K. Siozios, A. Bartzas and D. Soudris , "Architecture-Level Exploration of Alternative Interconnection Schemes Targeting 3D FPGAs: A Software-Supported Methodology", International Journal of Reconfigurable Computing, Vol. 2008, Article ID 76942, 18 pages.
2008 K. Siozios, A. Papanikolaou and D. Soudris, "A method and tool for early design/technology search-space exploration for 3D ICs",  IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), pp. 359-364, Oct. 2008, Rhodes, Greece.
2007 K. Siozios, K. Sotiriadis, V. F. Pavlidis and D. Soudris, "A Software-Supported Methodology for Designing High-Performance 3D FPGA Architectures", IPIP International Conference on Very Large Scale Integration (VLSI-SoC), pp. 54-59, Oct. 2007, Atlanta, USA.
2007

K. Siozios, K. Sotiriadis, V. F. Pavlidis and D. Soudris, "Exploring Alternative 3D FPGA Architectures: Design Methodology and CAD Tool Support", International Conference on Field Programmable Logic and Applications (FPL), pp. 652-656, Aug. 2007, Amsterdam, Netherlands.

Fault-Tolerant and Reliability Improvement

2016 K. Maragos, G. Lentaris, K. Siozios, D. Soudris and V. Pavlidis, "Application Performance Improvement By Exploiting Process Variability On FPGA Devices", Proceedings in Design, Automation and Testing in Europe (DATE), March 2017, Lausanne, Switzerland (accepted for publication).
2014 K. Siozios, D. Soudris and M. Hubner, "A Framework for Supporting Adaptive Fault Tolerant Solutions", ACM Transactions on Embedded Computing Systems, Vol. 13, No. 5s, Article 169, pp. 1-25, Nov. 2014.
2013 K. Siozios and D. Soudris, "A low-cost fault tolerant solution targeting commercial FPGA devices", Journal of System Architecture (JSA), Vol. 59, pp. 1255-1265, 2013.
2013 K. Siozios, D. Soudris and M. Hubner, "On Supporting Adaptive Fault Tolerant at Run-Time with Virtual FPGAs", IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), pp. 2206–2211, May 2013, Cambridge, MA.
2013 D. Diamantopoulos, K. Siozios, and D. Soudris, "A Framework for Performing Fault-Tolerant Placement Based on Genetic Algorithm", Workshop on Reconfigurable Computing (WRC), Jan. 2013, Berlin, Germany.
2012 K. Siozios and D. Soudris, "A low-cost fault tolerant solution targeting to commercial FPGA devices", NASA/ESA Conference on Adaptive Hardware and Systems (AHS), Special session on dependability by reconfigurable hardware, pp. 46-53, June 2012, Erlangen, Germany.
2012 D. Diamantopoulos, K. Siozios, S. Xydis and D. Soudris, "A Systematic Methodology for Reliability Improvements on SoC-based Software Defined Radio Systems", VLSI Design, Vol. 2012, Article ID 784945, 15 pages.
2012 K. Siozios and Dimitrios Soudris, "Low-cost fault tolerant targeting FPGA devices", Workshop on Reconfigurable Computing (WRC), Jan. 2012, Paris, France.
2011 K. Siozios, D. Rodopoulos and D. Soudris, "On Supporting Rapid Thermal Analysis", IEEE Computer Architecture Letters, Vol. 10, No. 2, pp. 53-56, July-December 2011.
2011 D. Diamantopoulos, K. Siozios, S. Xydis and D. Soudris, "Thermal optimization for micro-architectures through selective block replication", International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), pp. 59-66, July 2011, Samos, Greece.
2011 K. Siozios, D. Soudris, "Trading Fault-Masking with Performance Overhead for FPGAs", Workshop Proceedings on International Conference on Architecture of Computing Systems (ARCS), pp. 7–10, Feb. 2011, Como, Italy.
2011 K. Siozios, D. Rodopoulos and D. Soudris, "Quick_Hotspot: A Software Supported Methodology for Supporting Run-Time Thermal Analysis at MPSoC Designs", Workshop Proceedings on International Conference on Architecture of Computing Systems (ARCS), Feb. 2011, Como, Italy.
2010 K. Siozios and D. Soudris, "A Methodology for Alleviating the Performance Degradation of TMR Solutions", IEEE Embedded Systems Letters, Vol. 2, No. 4, pp. 111-114, Dec. 2010.
2010 K. Siozios, D. Soudris and D. Pnevmatikatos, "Towards Supporting Fault-Tolerance in FPGAs", IEEE Annual Symposium on VLSI (ISVLSI), pp. 446-447, July 2010, Kefalonia, Greece.
2010 K. Siozios, D. Soudris and D. Pnevmatikatos, "Fault-Free: A Framework for Supporting Fault Tolerance in FPGAs", Workshop on Reconfigurable Computing (WRC), Jan. 2010, Pisa, Italy.
2010 K. Siozios, D. Soudris and D. Pnevmatikatos, "A Framework for Enabling Fault Tolerance in Reconfigurable Architectures", International Workshop on Applied Reconfigurable Computing (ARC), pp. 257-268, Mar. 2010, Bangkok, Tailand.

Heterogeneous FPGAs

2013 H. Sidiropoulos, K. Siozios, D. Soudris, "On supporting rapid exploration of memory hierarchies onto FPGAs", Journal of Systems Architecture (JSA), Vol. 59, No. 2, pp. 78-90, Feb. 2013.
2011 M. Hubner, P. Figuli, R. Girardey, D. Soudris, K. Siozios and J. Becker, "A Heterogeneous Multicore System on Chip with Run-Time Reconfigurable Virtual FPGA Architecture", Reconfigurable Architectures Workshop (RAW), pp. 143-149, May 2011, USA.
2011 E. Xanthopoulos-Sotiriou, G. Economacos, K. Siozios and D. Soudris, "Systematic Synthesis of Multimode Reconfigurable RTL Components", Workshop on Reconfigurable Computing (WRC), pp. 95-104, Jan. 2011, Heraklion, Greece.
2011 H. Sidiropoulos, K. Siozios and D. Soudris, "A Methodology and Tool Framework for Supporting Rapid Exploration of Memory Hierarchies in FPGAs", Workshop on Reconfigurable Computing (WRC), pp. 75-84, Jan. 2011, Heraklion, Greece.
2009 K. Siozios and D. Soudris, "Designing a Novel High-Performance FPGA Architecture for Data Intensive Applications", Journal of Real-Time Image Processing, Springer Berlin/Heidelberg, Vol. 4, No. 2, pp. 155–166, June, 2009.
2008 K. Siozios, D. Soudris and A. Thanailakis, "Designing a General-Purpose Heterogeneous Interconnection Architecture for FPGAs", Journal of Low Power Electronics (JOLPE), Vol. 4, No. 1, pp. 34-47, April 2008.
2008 K. Siozios, D. Soudris and A. Thanailakis, "A Software-Supported Methodology for Designing General-Purpose Interconnection Networks for Reconfigurable Architectures", International Journal of Electronics, Circuits and Systems (IJECS), Vol. 4, No. 3, pp. 187-199, Summer 2008.
2007 K. Siozios, S. Mamagkakis, D. Soudris and A. Thanailakis, "Designing Heterogeneous FPGAs with Multiple SBs", International Workshop on Applied Reconfigurable Computing (ARC), pp. 91-96, March 2007, Brazil.
2006 K. Siozios and D. Soudris, "Wire Segment Length and Switch Box Co-Optimization for FPGA Architectures", International Conference on Field Programmable Logic and Applications (FPL), pp. 1-4, Aug. 2006, Madrid, Spain.
2006 K. Siozios, D. Soudris and A. Thanailakis, "Designing Alternative FPGA Implementations Using Spatial Data from Hardware Resources", International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 403-414, Sept. 2006, Montpellier, France.
2006 K. Siozios, K. Tatas, D. Soudris and A. Thanailakis, "Platform-based FPGA Architecture: Designing High-Performance and Low-Power Routing Structure for Realizing DSP Applications", Reconfigurable Architectures Workshop (RAW), pp. 10, 2006, Rhodes, Greece.
2006 K. Siozios, D. Soudris and A. Thanailakis, "A Novel Methodology for Designing High-Performance and Low-Power FPGA Interconnection Targeting DSP Applications", IEEE International Symposium on Circuits and Systems (ISCAS), pp. 4383-4386, Kos, Greece, 2006.

FPGA Design and Supporting CAD Tools

2015 K. Siozios, P. Figuli, H. Sidiropoulos, C. Tradowsky, K. Maragos, S. P. Delicia, D. Soudris and J. Becker, "TEAChER: TEach AdvanCEd Reconfigurable architectures and tools", International Workshop on Applied Reconfigurable Computing (ARC), pp. 103-114, April 2015, Bochum, Germany.
2012 K. Siozios, H. Sidiropoulos, D. Diamantopoulos, P. Figuli, D. Soudris, M. Hubner and J. Becker, "On Designing Self-Aware Reconfigurable Platforms", Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS), pp. 14-17, Aug, 2012, Oslo, Norway.
2011 H. Sidiropoulos, K. Siozios and D. Soudris, "A Methodology and Tool Framework for Supporting Rapid Exploration of Memory Hierarchies in FPGAs", International Conference on Field Programmable Logic and Applications (FPL), pp. 238-243, Sept. 2011, Chania, Greece.
2010 H. Sidiropoulos, K. Siozios and D. Soudris, "NAROUTO: An Open-Source Framework for Supporting Architecture-Level Exploration at Heterogeneous FPGAs", International Conference on Electronics, Circuits, and Systems (ICECS), pp. 532-535, Dec. 2010, Athens, Greece.
2008 K. Siozios, "Σχεδιασμός Υλικού και Λογισμικού Επαναδιαμορφούμενων Συστημάτων VLSI με Χαμηλή Κατανάλωση Ισχύος", Τμήμα Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών, Δημοκρίτειο Πανεπιστήμιο Θράκης, Ξάνθη, 2008.
2007 K. Tatas, K. Siozios, and D. Soudris, "A Survey of Existing Fine-Grain Reconfigurable Architectures and CAD Tools", Book Chapter in “Fine- and Coarse-Grain Reconfigurable Systems”, Editors: S. Vassiliadis and D. Soudris, pp. 3–88, Springer, 2007.
2005 K. Siozios, G. Koutroumpezis, K. Tatas, N. Vassiliadis, V. Kalenteridis, H. Pournara, I. Pappas, D. Soudris, S. Nikolaidis, S. Siskos, and A. Thanailakis, "The AMDREL Project in Retrospective", IFIP International Conference on Very Large Scale Integration (VLSI-SoC), Oct. 2005, Australia.
2005 K. Siozios, K. Tatas, G. Koutroumpezis, D. Soudris, and A. Thanailakis, "An Integrated Framework for Architecture Level Exploration of Reconfigurable Platform", International Conference on Field Programmable Logic and Applications (FPL), pp. 658-661, 2005, Tampere, Finland.
2005 D. Soudris, S. Nikolaidis, S. Siskos, K. Tatas, K. Siozios, G. Koutroumpezis, N. Vasiliadis, V. Kalenteridis, H. Pournara, I. Pappas, and A. Thanailakis, "AMDREL: A Novel Low-Energy FPGA Architecture and Supporting CAD Tool Design Flow", Proceedings of ASP-DAC 2005, Asia South Pacific Design Automation Conference (Design Contest), pp. D3-D4, 2005, Shanghai, China.
2004 V. Kalenteridis, H. Pournara, K. Siozios, K. Tatas, I. Pappas, S. Nikolaidis, S.Siskos, D. Soudris and A. Thanailakis, "A Complete Platform and Toolset for System Implementation on Fine-Grain Reconfigurable Hardware", Microprocessors and Microsystems, Elsevier Publishers, Vol. 29, No. 6, pp. 247-259, Aug. 2005.
2004 V. Kalenteridis, H. Pournara, K. Siozios, K. Tatas, I. Pappas, S. Nikolaidis, S. Siskos, D. J. Soudris and A. Thanailakis, "An Integrated FPGA Design Framework: Custom Designed FPGA Platform and Application Mapping Toolset Development", Reconfigurable Architectures (RAW), pp. 138-145, April 26-27, 2004, Santa Fe, New Mexico, USA.
2004 I. Pappas, N. Vassiliadis, V. Kalenteridis, H. Pournara, S. Nikolaidis, S. Siskos, K. Siozios, G. Koutroumpezis, K. Tatas, D. J. Soudris and A. Thanailakis, "Fine-Grain Reconfigurable Platform: FPGA Hardware Design and Software Toolset Development", Conference on Microelectronics Microsystems and Nanotechnology, pp. 352-356, Nov. 2004, Greece.
2003

K. Siozios, "Σχεδιασμός Βασικής Δομικής Μονάδας και Ανάπτυξη Εργαλείων Σχεδιασμού για Ενσωματωμένο FPGA", Τμήμα Ηλεκτρολόγων Μηχανικών και Μηχανικών Υπολογιστών, Δημοκρίτειο Πανεπιστήμιο Θράκης, Ξάνθη, 2003.

CAD Algorithms

2016 K. Siozios and D. Soudris, "A Customizable Framework for Application Implementation onto 3-D FPGAs", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 35, No. 11, pp. 1783-1796, 2016, DOI: 10.1109/TCAD.2016.2529421
2016 P. Danassis, K. Siozios and D. Soudris, "ANT3D: Simultaneous Partitioning and Placement for 3-D FPGAs based on Ant Colony Optimization", IEEE Embedded Systems Letters, Vol. 8, No. 2, pp. 41–44, 2016.
2016 P. Danassis, K. Siozios and D. Soudris, "Parallel Application Placement onto 3-D Reconfigurable Architectures", International Conference on Modern Circuits and Systems Technologies (MOCAST), pp. 1–5, May 2016, Thessaloniki, Greece.
2015 K. Maragos, K. Siozios and D. Soudris, "An Evolutionary Algorithm for Netlist Partitioning Targeting 3-D FPGAs", IEEE Embedded System Letters, Vol. 7, No. 4, pp. 117–120, Sept. 2015.
2015 D. Diamantopoulos, S. Xydis, K. Siozios and D. Soudris, "Mitigating Memory-induced Dark Silicon in Many-Accelerator Architectures", IEEE Computer Architecture Letters, Vol. 14, No. 2, pp. 136–139, 2015.
2015 D. Diamantopoulos, S. Xydis, K. Siozios and D. Soudris, "High-Level-Synthesis extensions for scalable Single-Chip Many-Accelerators on FPGAs", in Field Programmable Logic and Applications (FPL), International Conference on Field-Programmable Logic and Applications (FPL), pp.1-2, Sept. 2015, London, England.
2015 D. Diamantopolous, S. Xydis, K. Siozios and D. Soudris, "Dynamic Memory Management in Vivado-HLS for Scalable Many-Accelerator Architectures", International Workshop on Applied Reconfigurable Computing (ARC), pp. 117-128, April 2015, Bochum, Germany.
2015 K. Siozios, H. Sidiropoulos and D. Soudris, "Architectures and CAD Tools for 3D FPGAs", Book Chapter in "Reconfigurable Logic: Architecture, Tools and Applications", pp. 489–511, CRC press, Oct. 2015.
2015 D. Diamantopoulos, K. Siozios, S. Xydis and D. Soudris, "GENESIS: Parallel Application Placement onto Reconfigurable Architectures", ACM Transactions on Embedded Computing Systems, Vol. 14, No. 1, Article 18, 26 pages, January 2015.
2015 K. Maragos, K. Siozios and D. Soudris, "A Genetic Algorithm based Partitioning for 3-D Reconfigurable Architectures", Workshop on Reconfigurable Computing (WRC), Jan. 2015, Amsterdam, Netherlands.

2013

H. Sidiropoulos, K. Siozios, P. Figuli, D. Soudris, M. Hubner and J. Becker, "JITPR: A Framework for Supporting Fast Application’s Implementation onto FPGAs", ACM Transactions on Reconfigurable Technology and Systems (TRETS), Vol. 6, No. 2, Article 7, pp. 7:1-7-12, July 2013.

2013

D. Diamantopoulos, K. Siozios, S. Xydis and D. Soudris, "A Framework for Supporting Parallel Application Placement onto Reconfigurable Platforms", Workshop on Parallel Programming and Run-time Management Techniques for Many-core Architectures (PARMA), Jan. 2013, Berlin, Germany.
2012 H. Sidiropoulos, K. Siozios, P. Figuli, D. Soudris and M. Hubner, "On Supporting Efficient Partial Reconfiguration with Just-In-Time Compilation", Reconfigurable Architectures Workshop (RAW), pp. 328-335, May 2012, Shanghai, China.
2011 K. Siozios and D. Soudris, "A Tabu-based Partitioning And Layer Assignment Algorithm for 3-D FPGAs", IEEE Embedded Systems Letters, Vol. 3, No. 3, pp. 97-100, September 2011.
2010 K. Siozios and D. Soudris, "A Temperature-Aware Placement and Routing Algorithm Targeting 3D FPGAs", Book Chapter in “VLSI-SOC: Design Methodologies for SoC and SiP”, pp. 211–231, Springer, Dordrecht/London/Boston, 2010.
2009 K. Siozios, D. Soudris and A. Thanailakis, "A Novel Allocation Methodology for Partial and Dynamic Bitstream Generation of FPGA Architectures", Journal of Circuits, Systems, and Computers (JCSC), Vol. 19, No. 3, pp. 701-717, May 2010.
2008 K. Siozios and D. Soudris , "A Power-Aware Placement and Routing Algorithm Targeting 3D FPGAs", Journal of Low-Power Electronics (JOLPE), Vol. 4, No. 3, pp. 275-289, December 2008.
2008 K. Siozios and D. Soudris, "A Novel Algorithm for Temperature-Aware P&R on 3D FPGAs", IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct. 2008, Rhodes, Greece.
2008 K. Siozios and D. Soudris, "An Efficient Approach for Managing Power Consumption Hotspots Distribution on 3D FPGAs", International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 439–448, Sep. 2008, Lisbon, Portugal
2007 K. Siozios and D. Soudris, "A Novel Methodology for Temperature-Aware Placement and Routing of FPGAs", IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 55-60, May 2007, Porto Alegre, Brazil.
2007 D. Soudris, K. Tatas, K. Siozios, G. Koutroumpezis, S. Nikolaidis, S. Siskos, N. Vasiliadis, V. Kalenteridis, H. Pournara and I. Pappas, "AMDREL: A Novel Low-Energy FPGA Architecture and Supporting CAD Tool Design Flow", Chapter 3 in "Fine – and Coarse-Grain Reconfigurable Systems", Editors: S. Vassiliadis and D. Soudris, pp. 152-180, Springer, 2007.
2007 K. Siozios and D. Soudris, "A Temperature-Aware Mapping Methodology for FPGAs", ACM International Symposium on Field-Programmable Gate Arrays (FPGA), pp. 223, Feb. 2007, Monterey, California, USA.
2006 K. Siozios, K. Tatas, D. Soudris and A. Thanailakis, "A Novel Methodology for Designing High-Performance and Low-Energy FPGA Interconnection Architecture", ACM International Symposium on Field-Programmable Gate Arrays (FPGA), pp. 224, 2006, Monterey, USA.
2006 K. Siozios, D. Soudris and A. Thanailakis, "Efficient Power Management Strategy of FPGAs Using a Novel Placement Technique", IFIP International Conference on Very Large Scale Integration (VLSI-SoC), pp. 204-209, Oct. 2006, Nice, France.
2005 K. Siozios, G. Koutroumpezis, K. Tatas, N. Vasiliadis, V. Kalenteridis, H. Pournara, I. Pappas, D. Soudris, A. Thanailakis, S. Nikolaidis and S. Siskos, "A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications", IEICE Transactions on Information and Systems, Vol. E88-D, No. 7, pp. 1369-1380, July 2005.
2005 K. Siozios, G. Koutroumpezis, K. Tatas, D. Soudris, and A. Thanailakis, "DAGGER: A Novel Generic Methodology for FPGA Bitstream Generation and its Software Tool Implementation", Reconfigurable Architectures Workshop (RAW), pp. 165b, 2005, Colorado, USA.
2004 K. Siozios, G. Koutroumpezis, K. Tatas, D. Soudris, and A. Thanailakis, "A Novel FPGA Configuration Bitstream Generation Algorithm and Tool Development", International Conference on Field Programmable Logic and Applications (FPL), pp. 1116-1118, Aug. 2004, Belgium.

Virtualization

2017 P. Figuli, W. Ding, S. Figuli, K. Siozios, D. Soudris, and J. Becker, "Parameter Sensitivity in Virtual FPGA Architectures", Intern. Symposium on Applied Reconfigurable Computing (ARC), Netherlands, April 3 - 7, 2017, (accepted for publication).
2016 E. Sotiriou-Xanthopoulos, S. Xydis, K. Siozios and D. Soudris, "An Integrated Exploration and Virtual Platform Framework for Many-Accelerator Heterogeneous Systems", ACM Transactions on Embedded Computing Systems (TECS), Vol. 15, No. 3, Article 43, 26 pages, March 2016.
2016 E. Sotiriou-Xanthopoulos, L. Masing, K. Siozios, G. Economakos, D. Soudris, J. Becker, "An OpenCL-based Framework for Rapid Virtual Prototyping of Heterogeneous Architectures", In Virtual Prototyping of Parallel and Embedded Systems (VIPES), July 2016, Samos, Greece.
2016 K. Siozios, I. Savvidis and D. Soudris, "A Framework for Exploring Alternative Fault-Tolerant Schemes Targeting 3-D Reconfigurable Architectures", International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), July 2016, Samos, Greece.
2015 E. Sotiriou-Xanthopoulos, S. Xydis, K. Siozios, G. Economakos and D. Soudris, "Rapid prototyping and Design Space Exploration methodologies for many-accelerator systems", International Conference in Field-Programmable Logic and Applications (FPL), pp. 1–2, Sept. 2015, London, England.
2015 E. Sotiriou-Xanthopoulos, G. Shalina, P. Figuli, K. Siozios, G. Economakos, J. Becker, "A Power Estimation Technique for Cycle-Accurate Higher-Abstraction SystemC-based CPU Models", International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), pp. 70–77, July 2015, Samos, Greece.
2015 D. Diamantopoulos, E. Sotiriou-Xanthopoulos, K. Siozios, G. Economakos and D. Soudris, "Plug&Chip: A Framework for Supporting Rapid Prototyping of 3D Hybrid Virtual SoCs", ACM Transactions on Embedded Computing Systems, Vol. 13, No. 5s, Article 168, pp. 1-25,  Nov. 2015.
2014 E. Sotiriou-Xanthopoulos, S. Xydis, K. Siozios and G. Economakos, "Co-Design of Many-Accelerator Heterogeneous Systems Exploiting Virtual Platforms", Int. Conf. on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), pp. 1-8, July 2014, Samos, Greece.
2014 K. Siozios, D. Soudris and M. Hubner, "A Framework for Customizing Virtual 3-D Reconfigurable Platforms at Run-Time", IEEE International Parallel & Distributed Processing Symposium Workshops (IPDPSW), pp. 183-188, May 2014, Phoenix, USA.
2014 H. Sidiropoulos, K. Siozios and D. Soudris, "A Framework for Mapping Dynamic Virtual Kernels onto Heterogeneous Reconfigurable Platforms", IEEE International Parallel & Distributed Processing Symposium Workshops (IPDPSW), pp. 170-175, May 2014, Phoenix, USA.
2014 E. Xanthopoulos-Sotiriou, S. Xydis, K. Siozios, G. Economakos and D. Soudris, "Effective Platform-Level Exploration for Heterogeneous Multicores Exploiting Simulation-Induced Slacks", Proceedings of Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM), pp. 13-16, Jan. 2014, Vienna, Austria.
2013 H. Sidiropoulos, P. Figuli, K. Siozios, D. Soudris and J. Becker, "A Platform-Independent Runtime Methodology for Mapping Multiple Applications onto FPGAs Through Resource Virtualization", International Conference on Field-Programmable Logic and Applications (FPL), pp. 1-4, Sept. 2013, Porto, Portugal.
2013 E. Sotiriou-Xanthopoulos, K. Siozios, G. Economakos and D. Soudris, "A Process-Based Reconfigurable SystemC Module for Simulation Speedup", International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), pp. 72-79, July 2013, Samos, Greece.
2013 D. Diamantopoulos, K. Siozios, E. Sotiriou-Xanthopoulos, G. Economakos and D. Soudris, "HVSoCs: A Framework for Rapid Prototyping of 3-D Hybrid Virtual System-on-Chips", IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), pp. 2194–2199, May 2013, Cambridge, MA.

Network-on-Chip (NoC)

2016 E. Sotiriou-Xanthopoulos, S. Xydis, K. Siozios, G. Economakos and D. Soudris, "A Framework for Interconnection-Aware Domain-Specific Many-Accelerator Synthesis", ACM Transactions on Embedded Computing Systems (TECS), Vol. 16, No. 1, Article 8, 26 pages, November 2016.
2015 E. Sotiriou-Xanthopoulos, S. Xydis, K. Siozios and G. Economakos, "A virtual platform for exploring hierarchical interconnection for many-accelerator systems", Workshop on Virtual Prototyping of Parallel and Embedded Systems (VIPES), pp. 384–389, July 2015, Samos, Greece.
2014 "Designing 2D and 3D Network-on-Chip Architectures", Editors: K. Tatas, K. Siozios, A. Jantsch and D. Soudris, Springer, 2014.
2013 E. Sotiriou-Xanthopoulos, D. Diamantopoulos, K. Siozios, G. Economakos and D. Soudris, "A Framework for Rapid Evaluation of Heterogeneous 3-D NoC Architectures", Microprocessors and Microsystems (MICPRO), Vol. 38, pp.292-303, 2014.
2013 K. Tatas, K. Siozios, A. Bartzas, C. Kyriacou and D. Soudris, "A Novel Prototyping and Evaluation Framework for NoC-based MPSoC", International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS), Vol. 4, No. 3, pp. 1-24, 2013.
2010 K. Siozios, I. Anagnostopoulos and D. Soudris, "Multiple Vdd on 3D NoC Architectures", International Conference on Electronics, Circuits, and Systems (ICECS), pp. 833-836, Dec. 2010, Athens, Greece.
2010 K. Siozios, I. Anagnostopoulos and D. Soudris, "A High-Level Mapping Algorithm Targeting 3D NoC Architectures with Multiple Vdd", IEEE Annual Symposium on VLSI (ISVLSI), pp. 444–445, July 2010, Kefalonia, Greece.
2010 A. Richard, D. Milojevic, F. Robert, A. Bartzas, A. Papanikolaou, K. Siozios and D. Soudris, "Fast Design Space Exploration Environment Applied on NoC’s for 3D-Stacked MPSoC's", International Conference on Architecture of Computing Systems (ARCS), pp. 1–6, Hannover, Germany, Feb. 2010.
2009 K. Tatas, C. Kyriacou, A. Bartzas, K. Siozios and D. Soudris, "A Novel NoC Architecture Framework for 3D Chip MPSoC Implementations", Friday Workshop on 3D Integration at Design, Automation and Testing in Europe (DATE), 24 April 2010, Gemrany.
2009 A. Bartzas, K. Siozios and D. Soudris, "Topology Exploration and Buffer Sizing for Three-Dimensional Networks-on-Chip", Friday Workshop on 3D Integration at Design, Automation and Testing in Europe (DATE), 24 April 2009, Nice, France.

2008

A. Bartzas, K. Siozios, and D. Soudris, "Three Dimensional Network-on-Chip Architectures", Book Chapter "Networkson Chips: Theory and practice", Editors: F. Gebali, H. Elmiligi, M. W. El-Kharashi, pp. 1–28, CRC Press, 2008.
2007 A. Bartzas, N. Skalis, K. Siozios, D. Soudris, "Exploration of Alternative Topologies for Application-Specific 3D Networks-on-Chip", Workshop on Application Specific Processors (WASP), October 4, 2007.

Application Implementation onto FPGAs

2015 G. Lentaris, I. Stamoulias, D. Diamantopoulos, K. Maragos, K. Siozios, D. Soudris, M. Aviles Rodrigalvarez, M. Lourakis, X. Zabulis, I. Kostavelis, L. Nalpantidis, E. Boukas and A. Gasteratos, "SPARTAN/SEXTANT/COMPASS: Advancing Space Rover Vision via Reconfigurable Platforms", International Workshop on Applied Reconfigurable Computing, pp 475-486, Apr. 2015, Bochum, Germany.
2015 P. Figuli, C. Tradowsky, J. A. Lucio Martinez, H. Sidiropoulos, K. Siozios, H. Stenschke, D. Soudris, and J. Becker, "A Novel Concept for Adaptive Signal Processing on Reconfigurable Hardware", International Workshop on Applied Reconfigurable Computing (ARC), pp. 311-320, April 2015, Bochum, Germany.
2015 D. Diamantopoulos, I. Galanis, K. Siozios, G. Economakos and D.Soudris, "A Framework for Rapid System-Level Synthesis Targeting to Reconfigurable Platforms: A Computer Vision Case Study", Workshop on Reconfigurable Computing (WRC), Jan. 2015, Amsterdam, Netherlands.
2014 E. Sotiriou-Xanthopoulos, S. Xydis, K. Siozios, G. Economakos and D. Soudris, "Hardware Accelerated Rician Denoise Algorithm for High Performance Magnetic Resonance Imaging", International Conference on Wireless Mobile Communication and Healthcare (MOBIHEALTH), pp. 222-225, Nov. 2014, Athens, Greece.
2013 I. Kostavelis, L. Nalpantidis, E. Boukas, M. Aviles Rodrigalvarez, I. Stamoulias, G. Lentaris, D. Diamantopoulos, K. Siozios, D. Soudris, A. Gasteratos, "SPARTAN: Developing a Vision System for Future Autonomous Space Exploration Robots", Journal of Field Robotics, pp. 1–34, Wiley Periodicals, Inc., 2013, DOI: 10.1002/rob.21484.
2013 G. Lentaris, I. Stamoulias, D. Diamantopoulos, K. Siozios, and D. Soudris, "An FPGA implementation of the SURF algorithm for the ExoMars programme", Workshop on Reconfigurable Computing (WRC), Jan. 2013, Berlin, Germany.
2013 G. Lentaris, D. Diamantopoulos, K. Siozios, I. Stamoulias, I. Kostavelis, E. Boukas, L. Nalpantidis, D. Soudris, A. Gasteratos, and M. Aviles, "SPARTAN: Efficient Implementation of Computer Vision Algorithms for Autonomous Rover Navigation", Workshop on Reconfigurable Computing (WRC), Jan. 2013, Berlin, Germany.
2012 G. Lentaris, D. Diamantopoulos, G. Stamoulias, K.Siozios, D.Soudris and M. Avilés Rodrigálvarez, "FPGA-based Path-planning of High Mobility Rover for Future Planetary Missions", International Conference on Electronics, Circuits, and Systems (ICECS), pp. 85-88, Dec. 2012, Sevilla, Spain.
2012 G. Lentaris, D. Diamantopoulos, K. Siozios, D. Soudris and M. Aviles, "Hardware Implementation of Stereo Correspondence Algorithm for the ExoMars Mission", International Conference on Field-Programmable Logic and Applications (FPL), pp. 667-670, Aug. 2012, Oslo, Norway.
2012 D. Diamantopoulos, K. Siozios, G. Lentaris, D. Soudris and M. Aviles Rodrigalvarez, "SPARTAN Project: On Profiling Computer Vision Algorithms for Rover Navigation", NASA/ESA Conference on Adaptive Hardware and Systems (AHS), pp. 174-181, June 2012, Erlangen, Germany.
2012 D. Diamantopoulos, G. Lentaris, A. Douklias, K.Siozios, D.Soudris and M. Aviles Rodrigalvarez, "The SPARTAN Project: FPGA-based Implementation of Computer Vision Algorithms Targeting to Space Applications", PAnhellenic Conference on Electronics and Telecommunications (PACET), 2012, Thessaloniki, Greece.
2011 M. Avilés, K. Siozios, D. Diamantopoulos, L. Nalpantidis, I. Kostavelis, E. Boukas, D. Soudris and A. Gasteratos, "A Co-design Methodology for Implementing Computer Vision Algorithms for Rover Navigation onto Reconfigurable Hardware", Workshop on Computer Vision on Low-Power Reconfigurable Architectures at FPL, Sept. 2011, Chania, Greece.
2011 K. Siozios, D. Diamantopoulos, I. Kostavelis, E. Boukas, L. Nalpantidis, D. Soudris, A. Gasteratos, M. Aviles and I. Anagnostopoulos, "SPARTAN Project: Efficient Implementation of Computer Vision Algorithms onto Reconfigurable Platform Targeting to Space Applications", Workshop on Reconfigurable Communication Centric Systems-on-Chip (ReCoSoC), pp. 1-9, June, 2011, Montpellier, France.

Power Optimization

2003 K. Tatas, K. Siozios, D. Soudris, and A. Thanailakis, "Power-Efficient Implementations of Multimedia Applications on Reconfigurable Platforms", International Conference on Field Programmable Logic and Applications (FPL), pp. 1032-1035, Sep. 1-3, 2003, Lisbon, Portugal.
2003 K. Tatas, K. Siozios, N. Vasiliadis, D. J. Soudris, S. Nikolaidis, S. Siskos, and A. Thanailakis, "FPGA Architecture Design and Toolset for Logic Implementation", International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 607-616, Sep. 2003,Torino, Italy.
2003 K. Tatas, K. Siozios, D. Soudris, K. Masselos, K. Potamianos, S. Blionas and A. Thanailakis, "Power Optimization Methodology for Multimedia Applications Implementation on Reconfigurable Platforms", International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 430-439, Sep. 2003, Torino, Italy.
 

Smart Cities / Internet-of-Things (IoT) / CyberPhysical Systems (CPS)

2017 P. Danassis, K. Siozios, C. Korkas, D. Soudris and E. Kosmatopoulos, "A Low-Complexity Control Mechanism Targeting Smart Thermostats", Energy and Buildings, Volume 139, No. 15, pp. 340-350, March 2017.
2016 K. Siozios, P. Danassis, N. Zompakis, E. Kosmatopoulos and D. Soudris, "Supporting Decision Making for Large-Scale IoTs: Trading Accuracy with Computational Complexity", Book Chapter in "Components and Services for IoT Platforms: Paving the Way for IoT Standards", Editors: G. Keramidas, N. Voros and M. Hübner, pp. 233–250, Springer International Publishing, Sept. 2017.
2015 N. Zompakis and K. Siozios, "A Framework for Reducing the Modeling and Simulation Complexity of Cyberphysical Systems", Workshop on Virtual Prototyping of Parallel and Embedded Systems (VIPES), pp. 360–365, July 2015, Samos, Greece.
 

Programming

2001 A. Karakos and K. Siozios, "Secure Networking Using Mobile IP", Panhellenic Conference on Informatics, pp. 284-293, 8-10 November 2001, Nicosia, Cyprus.
2003 K. Siozios, P. Efraimidis and A. Karakos, "Design and Implementation of a Secure Mobile IP Architecture", Panhellenic Conference in Informatics, pp. 269-279, Nov. 2003, Thessaloniki, Greece.
 

Last update: 07 October 2016